Taiwan Semiconductor Manufacturing Firm (TSMC) simply held its 2024 North America Know-how Symposium, the place it stuffed in attendees and traders on its expertise roadmap for the long run.
You could rightly ask: okay however what does this need to do with me, a person of Apple merchandise? Properly, TSMC is a chip fabrication firm, and certain probably the most superior one on the earth. They’ve been Apple’s companion for practically all of its chips main chips—the A collection for iPhones and iPads, the M collection for Macs, and extra. And Apple is commonly first in line for brand spanking new manufacturing processes from TSMC, paying a premium to be the primary buyer to get to make use of 5nm or 3nm applied sciences, for instance.
Right here’s a abstract of the TSMC roadmap and what it would imply for future Apple silicon, and due to this fact future iPhones, iPads, Macs, and extra.
What’s a nanometer?
Earlier than we discuss TSMC’s future applied sciences, let’s have a fast reminder on what a “nanometer” is on this context. Technically, it’s one billionth of a meter. A human hair is between 50,000 and 100,000nm thick. Most micro organism are between 1,000 and 10,000 nanometers.
In silicon course of expertise, the “nanometer” measurement is how large a number of the options of the chip are. Totally different corporations measure completely different options–it was the size between the supply and drain elements of a field-effect transistor (FET), however as of late completely different elements are measured by completely different corporations.
Apple
In different phrases, 5nm means some particular elements of the chip are solely 5 nanometers large, however TSMC’s 5nm just isn’t the identical as Intel’s 5nm, just isn’t the identical as Samsung’s 5nm, and so forth. A smaller nanometer quantity means you’ll be able to match extra chip logic or cache or no matter in the identical quantity of area, which may result in extra highly effective chips, decrease energy consumption, smaller chips that match into smaller gadgets, and so forth.
Consider it a bit like taking a look at a metropolis in Apple Maps–zooming out makes all the pieces smaller, placing extra buildings, streets, and land on the identical quantity of display screen. That’s what transferring to a smaller nanometer course of is like extra “metropolis” in the identical area.
There are numerous different necessary points of a microprocessor, together with the best way transistors are insulated, supplies used, and a lot extra, however the “nanometer” measurement has caught as a manner of differentiating one main manufacturing technology from one other.
3nm progress
Apple was first with TSMC’s preliminary 3nm course of, which was known as N3. The corporate has now refined that with the N3E course of, which is what we expect Apple will use in its most superior merchandise this fall (A18 and M4). Whereas it may appear important, the primary focus of N3E is to make the chips extra reasonably priced. There are some slight variations in density and efficiency nevertheless it’s not a serious generational change.
2nm coming subsequent 12 months
The subsequent main change is the shift to 2nm, which is predicted to occur in 2025. Apple is as soon as once more anticipated to be the primary main (and probably solely) buyer, so it’s attainable that the A19 or different chips (perhaps an M5?) that ship in late 2025 will use this course of. All of it comes all the way down to TSMC’s potential to work out the kinks in manufacturing and yields and such in time to provide tens of hundreds of thousands of chips with it.
In comparison with the N3E course of, the N2 course of is predicted to cut back energy consumption by 25-30 p.c (for a chip of the identical complexity and frequency) or to enhance efficiency by 10-15 p.c on the identical energy consumption. Chip density (how a lot stuff suits right into a single space) is predicted to extend by 15 p.c.
An attention-grabbing change to this technology of chips, in addition to merely being smaller/denser/quicker, is one thing TSMC calls “NanoFlex.” It’ll enable chip designers to make use of cells from completely different chip libraries all on the identical wafer. Normally, a chip designer has to make use of all blocks from a “low energy,” “excessive density,” or “excessive efficiency” library, relying on an important wants of the chip. By letting designs use completely different elements from completely different libraries, chips can fine-tune completely different areas to their wants.
For instance, Apple might resolve it’s most necessary to make the video and audio encoders and decoders a part of the chip as small as attainable and lay out that a part of the chip utilizing the high-density design libraries whereas utilizing the energy-efficient libraries for the low-power CPU cores and the high-performance libraries for the efficiency CPU cores.
For the chips Apple produces, the limiting issue tends to be energy and thermal dissipation. So you’ll be able to in all probability count on chips made with the N2 course of to have extra “stuff” in them (cores, cache, larger and extra complicated video encoders, and so forth) to the tune of 15-20 p.c, with barely increased clock speeds and due to this fact efficiency, in comparison with chips from the 12 months earlier than. Nonetheless, the power to optimize particular elements of the chip with instruments from completely different chip libraries has the potential to repay large by way of increased “peak” efficiency or decrease idle energy.
The 12 months after N2 is launched, TSMC can have two enhanced variations of the method: N2P which is concentrated on high efficiency, and N2X targeted on decrease voltages and energy consumption. It’s unclear whether or not Apple will undertake a kind of for the chips that are available in 2026.
A16—we’re doing angstroms now?
The key shift after 2nm (N2) is a course of TSMC calls A16 (no relation to the A16 Bionic). It’s a 1.6-nanometer course of however now that issues are getting so small, they’re kind of getting off “nanometers” and switching to “angstroms.” An angstrom is a ten-billionth of a meter, or 10 occasions smaller than a nanometer.
This one just isn’t coming till late 2026, nearly definitely too late for Apple to make use of that 12 months. We’ll see chips made with the A16 course of from Apple in 2027, almost certainly.
TSMC gave some early estimates in comparison with the approaching N2P course of, the place A16 is predicted to enhance efficiency by 8-10 p.c on the identical voltage and complexity or scale back energy by 15-20 p.c on the identical frequency and transistor depend.
The massive innovation within the A16 technology can be bottom energy supply, one thing TSMC calls “Tremendous Energy Rail.” This runs a community for energy distribution on the again aspect of the silicon wafer, linked to the transistors by way of little tunnels by way of it. This improves density and doubtlessly reliability, as energy doesn’t need to be routed round with all of the sign and clock distribution strains on the highest aspect of the chip. Different chip producers are pursuing related applied sciences (Intel’s PowerVia involves thoughts)—mainly completely different approaches to the identical concept.
TSMC could also be just a little later than opponents like Intel with this sort of expertise, because it has been pushed again just a little. It was initially anticipated to debut within the N2P course of, and now can be first launched in A16 as an alternative.
Chips in Apple merchandise that use the A16 course of will have the ability to have much more stuff (extra cores, larger caches) than the N2 course of whereas sustaining the identical energy profile.
Having chips with extra density or a greater energy profile sooner than others is one in all Apple’s large benefits, however the true magic comes from wonderful chip design and software program improvement that optimizes Apple’s software program particularly for the chips they produce.